851 The Rtl Nor Gate

Figure 8.6 shows how a resistor transistor logic (RTL) gate is built up from an arrangement of resistors and a transistor. There are three inputs: A, B, and C. If one

Fig. 8.6 An RTL NOR gate

or more of these inputs is high (logic 1), the output will be low (logic 0). The output is shown as A + B + C with a line, or bar, over the top (the + sign means OR). Thus the A + B + C with the line above means 'not A or B or C' (NOR : NOT OR).

The base resistors Rb have a value that ensures that the base current, even when only one input is high (logic 1), will drive the transistor into saturation to make the output low (logic 0).

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